Introduction

Now we’ll start driving the new Xilinx Vitis tool!  This section will cover the installation of the tool for the use-case at hand.  That is, for the acceleration of an algorithm on a Xilinx Alveo™ Data Center accelerator card.  Then the Ethash code will be brought into the tool, refactored as necessary, and built.  It’s important to note up front that we are not attempting to optimize the code in this article as this is left as an exercise for interested readers!

Installation of Vitis

This section provides quick overview of installing Vitis technology.  For complete details, including system requirements, refer to the <installation/release notes> (UG<####>).

The Xilinx Vitis installer can be downloaded from here:

·        <download_link>

The Vitis tool can be used for various applications (e.g. embedded development, AI edge development,  high-performance compute acceleration) but for our acceleration use-case it will need to be installed on a Linux box with a fair bit of available disk space (~50GB).

Downloading and installing the tool will require Xilinx user credentials so if you don’t already have a free Xilinx user account you will want to create one: https://www.xilinx.com/registration/create-account.html.

Once you’ve downloaded the installer (*.bin file) simply run it as an executable.  If the file doesn’t have execution privileges, you’ll need to add it.  For example:

chmod +x <Xilinx_Installer_file>.bin

./<Xilinx_Installer_file>.bin

Alternatively, if you downloaded the complete offline installer you just run the setup file:

./xsetup

The installer will prompt you to select optional components.  The breakdown of these components will look something like:

Design Tools

o   IDE

o   DocNav

Devices

o   Install devices for Alveo and Xilinx edge acceleration platforms

o   Devices for Custom Platforms

o   Engineering Sample Devices

Installation Options

These options can impact the install size quite a bit so to minimize the install footprint you can deselect the “Devices for Custom Platforms” device component.  Otherwise the remaining default options will be fine.

Additional Dependencies

Vitis technology leverages the OpenCL framework for acceleration flows and to compile OpenCL applications the appropriate header files are required.  For Ubuntu this is handled by the ocl-icd-opencl-dev package.

sudo apt install ocl-icd-opencl-dev

Although it was worth highlighting this particular package because of the important role OpenCL will play, this step can be skipped because it will be installed along with other XRT dependencies as covered next.

The Vitis application acceleration development flow also relies on a Xilinx Runtime (XRT) framework.  XRT is simply a software stack for the deployment environment that established an interface between the host and the targeted acceleration device.  Even if your development environment is separate from your deployment environment XRT will still be needed to build acceleration applications.  To ensure all the dependencies of XRT are met before installing the framework a shell script is provided in the XRT GitHub repo.  This can be downloaded and run as follows.

$ wget https://raw.githubusercontent.com/Xilinx/XRT/master/src/runtime_src/tools/scripts/xrtdeps.sh

$ chmod +x xrtdeps.sh

$ sudo ./xrtdeps.sh

Lastly, we install XRT itself and some board-specific packages.  In this article we will target the Xilinx Alveo U200 so these final packages can be downloaded from the U200 Getting Started page:

Three separate packages will be needed from the site above.  They will have names along the lines of:

  1. xrt_*.deb
  2. xilinx-u200-xdma-*.deb
  3. xilinx-u200-xdma-*-dev-*.deb

Install each of these in sequence.  It’s also worth noting that despite the naming of the packages both the “Deployment Shell” and the “Development Shell” are needed on the development/build environment.  An example of installing a particular version of these packages is given below.

$ sudo apt install ./xrt_201910.2.2.2173_18.04-xrt.deb

$ sudo apt install ./xilinx-u200-xdma-201830.2-2580015_18.04.deb

$ sudo apt install ./xilinx-u200-xdma-201830.2-dev-2580015_18.04.deb

 

Creating a New Acceleration Application

Time to launch the Vitis tool and get our hands dirty!  If launching the tool from the command line the shell environment must first be setup correctly using a supplied script.  For example:

$ source /opt/Xilinx/Vitis/2019.2/settings64.sh

$ vitis&

From the Vitis IDE we create a new Application Project (e.g. File > New > Application Project…).  After naming the project you’ll be asked to select a platform.  Which platforms are available will depend upon which board-specific packages that were installed.  Since we installed packages for the U200 at least this platform should be available, in addition to possibly some pre-installed defaults.

New Application Project

Moving forward with the U200 platform selected we then choose to create the “Vector Addition” example.  Once the application is created the project should resemble the screenshot below.

Project

Although we could’ve started with an empty application, choosing the vector addition example will allow us to leverage the supplied host code.  OpenCL involves a fair bit of boilerplate code, so it’ll be nice to not re-write that.

Now readers not familiar with Xilinx acceleration flows are certainly encouraged to play around with the simple vector addition example.  This goes hand-in-hand with several supporting resources such as:

  • Vitis tutorial
  • GitHub SDAccel Tutorials
  • GitHub SDAccel Examlpes

In this article, however, we’ll cut to the chase and replace the example kernel with Ethash code.  But first a quick summary of the source files:

  • vadd.cpp->pow.cpp: This is the main application file and represents the host code.  It’s responsible for initializing the OpenCL framework and loading/executing the acceleration kernel.
  • vadd.h->pow.h: Just a header file for the application.  Includes the required OpenCL header.
  • rnl_vadd.cl->krnl_ethash.cl: Actual kernel.  Ultimately this code will get run on the targeted FPGA.
  • xcl.*: These just provide helper functions.  For this simple example, they aren’t used and can be ignored/removed.

Note how each file above was also renamed, as indicated by ‘->’, to better reflect the desired application.


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About Shaun Purvis

About Shaun Purvis

Shaun Purvis is a Processor Specialist Field Application Engineer (FAE) covering Eastern Canada.  He works across a variety of industries, including Wired/Wireless Communications, Audio/Video Broadcast, and Industrial Vision, supporting embedded applications as well as artificial intelligence (AI) solutions.  Prior to Xilinx Shaun worked at a consulting company as an ARM processor and Xilinx SoC specialist where he did a lot of globetrotting and training as the embedded industry embraced these technologies.  Shaun grew up on the West Coast of BC, graduated from McGill University, and started his professional career in California.  He now lives with his family in Montreal where he enjoys scaling up mountains in summer and sliding down them in winter.